Inspection And Metrology Catching Up For High-Density Fan-Out Panel Packaging

Key Takeaways: To support AI/HPC devices, high-density fan-out on panels must deliver increased RDL layer count and micropillar height while decreasing the trace and bump/micropillar pitch. Metrology and inspection steps assist with achieving known-good panel requirements to avoid throwing away expensive chiplets, such as HBM and TPUs. Optical measurement systems need to account for panel warpage. Soaring AI/HPC device demand is driving leading-edge foundries to support the transition from wafer