Chip Industry Week In Review

IBM unveiled a 7Å transistor architecture that uses staggered nanosheet transistors stacked on a precisely beveled angle, almost like tiles on a roof. That allows more transistors to be crammed into a given area, boosting performance by 50% or power efficiency by up to 70%. Perhaps even more important, IBM claims a 40% improvement in SRAM scaling, which is orders of magnitude faster and lower latency than HBM. Mass production is slated for ~2031. Fig. 1: Huiming Bu, IBM VP of Semiconductor Globa