Chip Industry Technical Paper Roundup: Sept. 29

New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations System-Technology Co-Evaluation of A7 CFET and A10 NSFET Technologies from Cell Parasitics to Chip Reliability TU Munich , University of Modena and Reggio Emilia , Applied Materials Wafer-scale 2D MoS₂ transistors with sub-5nm channel length and subthreshold performance beyond the silicon limit Carnegie Mellon University , University of Florida , MIT , Texas A&M University Toward Mu