Cadence Expands ChipStack AI Super Agent with a New Agent for RTL Generation and Early PPA Optimization

Cadence today introduced a new agent for Cadence® ChipStack AI Super Agent that automates front‑end digital design and verification—covering power, performance and area (PPA)-driven spec‑to‑RTL generation, RTL analysis, and refinement; all from natural language prompts. Building on the industry’s first agentic workflow for front‑end design and verification announced in February 2026, this RTL Generation Agent extends the ChipStack AI Super Agent from autonomous verification and debug into high‑q